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NXP Semiconductors /LPC13xx /SYSCON /USBPLLCLKUEN

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Interpret as USBPLLCLKUEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NO_CHANGE)ENA 0RESERVED

ENA=NO_CHANGE

Description

USB PLL clock source update enable

Fields

ENA

Enable USB PLL clock source update

0 (NO_CHANGE): No change

1 (UPDATE_CLOCK_SOURCE): Update clock source
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data